/**
 @file sys_usw_dmps_mc_reg.c

 @author  Copyright (C) 2022 Centec Networks Inc.  All rights reserved.

 @date 2022-10-25

 @version v1.0

*/

/// TEMP COMMENT
/// mcmac_reg.c content :
///  #1, mcmac reg cfg
///  #2, mcpcs reg cfg
///  #3, mchata reg cfg
/****************************************************************************
 *
* Header Files
*
****************************************************************************/
#include "drv_api.h"
#include "usw/include/drv_common.h"
#include "ctc_error.h"
#include "sys_usw_dmps_reg.h"
#include "sys_usw_dmps_mc_reg.h"
#include "sys_usw_datapath.h"
#include "sys_usw_dmps_db.h"


extern sal_file_t g_tm_dump_fp;
extern uint8 g_dmps_dbg_sw;

#define DRV_IOW_FIELD_NZ(core_id, pp_id, dp_id, lchip, memid, inst_id, fieldid, value, ptr) \
    do\
    {\
        int32 retv = 0;\
        char   fld_str[64] = {0};\
        retv = drv_set_field(lchip, memid, fieldid, ptr, value);\
        if (retv < 0)\
        {\
            return(retv); \
        }\
        drv_usw_get_field_string_by_id(lchip, memid, fieldid, fld_str);\
        if ((NULL != g_tm_dump_fp) && (g_dmps_dbg_sw))\
        {\
            if ((255 != pp_id) && (255 != dp_id))\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s 0 %-45s 0x%x inst %-5d core %u pp %u dp %u\n", \
                TABLE_NAME(lchip, memid), fld_str, *value, inst_id, core_id, pp_id, dp_id); \
            }\
            else if ((255 != pp_id))\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s 0 %-45s 0x%x inst %-5d core %u pp %u\n", \
                TABLE_NAME(lchip, memid), fld_str, *value, inst_id, core_id, pp_id); \
            }\
            else\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s 0 %-45s 0x%x inst %-5d core %u\n", \
                TABLE_NAME(lchip, memid), fld_str, *value, inst_id, core_id); \
            }\
        }\
    }\
    while(0)

#define DRV_IOW_ENTRY(lchip, memid, inst_id, entry_id, fieldid, value, ptr) \
    do\
    {\
        int32 retv = 0;\
        char   fld_str[64] = {0};\
        retv = drv_set_field(lchip, memid, fieldid, ptr, value);\
        if (retv < 0)\
        {\
            return(retv); \
        }\
        drv_usw_get_field_string_by_id(lchip, memid, fieldid, fld_str);\
        if ((NULL != g_tm_dump_fp) && (g_dmps_dbg_sw))\
        {\
            sal_fprintf(g_tm_dump_fp, "write %-35s %-5d %-45s 0x%x inst %-5d\n", \
                TABLE_NAME(lchip, memid), entry_id, fld_str, *value, inst_id); \
        }\
    }\
    while(0)

#define DRV_IOW_ENTRY_NZ(core_id, pp_id, dp_id, lchip, memid, inst_id, entry_id, fieldid, value, ptr) \
    do\
    {\
        int32 retv = 0;\
        char   fld_str[64] = {0};\
        retv = drv_set_field(lchip, memid, fieldid, ptr, value);\
        if (retv < 0)\
        {\
            return(retv); \
        }\
        drv_usw_get_field_string_by_id(lchip, memid, fieldid, fld_str);\
        if ((NULL != g_tm_dump_fp) && (g_dmps_dbg_sw))\
        {\
            if ((255 != pp_id) && (255 != dp_id))\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s %-5d %-45s 0x%x inst %-5d core %u pp %u dp %u\n", \
                    TABLE_NAME(lchip, memid), entry_id, fld_str, *value, inst_id, core_id, pp_id, dp_id); \
            }\
            else if ((255 != pp_id))\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s %-5d %-45s 0x%x inst %-5d core %u pp %u\n", \
                    TABLE_NAME(lchip, memid), entry_id, fld_str, *value, inst_id, core_id, pp_id); \
            }\
            else\
            {\
                sal_fprintf(g_tm_dump_fp, "write %-35s %-5d %-45s 0x%x inst %-5d core %u\n", \
                    TABLE_NAME(lchip, memid), entry_id, fld_str, *value, inst_id, core_id); \
            }\
        }\
    }\
    while(0)


#define ______WRITE_MCMAC_REGISTER_API______
int32
sys_usw_dmps_mcmac_reg_write_cal_ctrl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacCalCtrl_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacCalCtrl_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_credit_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacCreditCtl_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacCreditCtl_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacCreditCtl_cfgTxCreditThrd_0_cfgTxCreditThrd_f:
                step   = McMacCreditCtl_cfgTxCreditThrd_1_cfgTxCreditThrd_f - McMacCreditCtl_cfgTxCreditThrd_0_cfgTxCreditThrd_f;
                fld_id = McMacCreditCtl_cfgTxCreditThrd_0_cfgTxCreditThrd_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_init(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacInit_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacInit_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_mac_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMacRxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacMacRxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMacRxCfg_cfgMacMuxMcMacRxEnDisable_f:
            case McMacMacRxCfg_cfgMacMuxMcMacRxEnValue_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxCrcCheckEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxFreeRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxLocalRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxPktEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxSelTsFormat_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxSpeed_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxStatsRuntPauseEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxStatsRuntPfcEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTailTsEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTailTsMode_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTodRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_mac_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMacTxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacMacTxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMacTxCfg_cfgMacMuxMcMacTxEnDisable_f:
            case McMacMacTxCfg_cfgMacMuxMcMacTxEnValue_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacPmInterval_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxAppendCrcEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxErrMaskOff_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxFreeRtcId_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxKeepTsEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPadEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPauseStallEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPktEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPtpErrEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxSendEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxStatsBypassEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxStripCrcEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxTodRtcId_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxTsCompensateEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_mii_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMiiRxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacMiiRxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxBuffMaxDepth_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxChkLinkForSop_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultFilterEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultFilterTimer_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultMaskLinkEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxForceFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxIgnoreLinkDownFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkDownForceFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkFilterEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkFilterTimer_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacRx4ByteAlignEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacRxCtSuperG2Mod_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMiiSfdValue_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_mii_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMiiTxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacMiiTxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffLowThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffRdThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxRdMask_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTx4ByteAlignEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxAmInsertEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxAmInterval_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxChanSpeed_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxCtSuperG2Mod_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxDicEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxFlushEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreLintFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreLocalFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreRemoteFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgDelEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgDelInterval_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgLen_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxLaneSpeed_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxMarkUnderrun_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxOverClockEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxPreambleLen_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxRsFecEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxRsFecMode_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxThreshold_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_pause_rx_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacPauseRxCtl_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacPauseRxCtl_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxNormPauseEn_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxNormPauseEn_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxNormPauseEn_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxNormPauseEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos0_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectCos0_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos0_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos0_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos1_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectCos1_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos1_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectCos1_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn0_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectEn0_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn0_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn0_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn1_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectEn1_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn1_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectEn1_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer0_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectTimer0_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer0_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer0_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer1_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseLockDetectTimer1_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer1_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseLockDetectTimer1_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerAdjValue_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseTimerAdjValue_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerAdjValue_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerAdjValue_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerDecValue_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseTimerDecValue_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerDecValue_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerDecValue_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerIndex_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPauseTimerIndex_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerIndex_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPauseTimerIndex_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPauseEn_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPfcPauseEn_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPauseEn_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPauseEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPriorityEn_f:
                step   = McMacPauseRxCtl_mcMacPauseRxCfg_1_cfgMcMacRxPfcPriorityEn_f - McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPriorityEn_f;
                fld_id = McMacPauseRxCtl_mcMacPauseRxCfg_0_cfgMcMacRxPfcPriorityEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_pause_tx_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacPauseTxCtl_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacPauseTxCtl_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacPausePulseSel_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacPausePulseSel_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacPausePulseSel_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacPausePulseSel_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseEn_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseEn_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseEn_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaHi_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseMacSaHi_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaHi_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaHi_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaLo_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseMacSaLo_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaLo_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseMacSaLo_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseQuanta_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseQuanta_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseQuanta_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseQuanta_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerAdjValue_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseTimerAdjValue_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerAdjValue_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerAdjValue_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerDecValue_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseTimerDecValue_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerDecValue_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseTimerDecValue_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseType_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPauseType_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseType_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPauseType_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPfcPriorityEn_f:
                step   = McMacPauseTxCtl_mcMacPauseTxCfg_1_cfgMcMacTxPfcPriorityEn_f - McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPfcPriorityEn_f;
                fld_id = McMacPauseTxCtl_mcMacPauseTxCfg_0_cfgMcMacTxPfcPriorityEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_pcs_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacPcsCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacPcsCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacPcsCfg_mcMacPcsCfg_0_cfgAlternateEncode_f:
                step   = McMacPcsCfg_mcMacPcsCfg_1_cfgAlternateEncode_f - McMacPcsCfg_mcMacPcsCfg_0_cfgAlternateEncode_f;
                fld_id = McMacPcsCfg_mcMacPcsCfg_0_cfgAlternateEncode_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsCfg_mcMacPcsCfg_0_cfgMcMacPcsSyncStatusDisable_f:
                step   = McMacPcsCfg_mcMacPcsCfg_1_cfgMcMacPcsSyncStatusDisable_f - McMacPcsCfg_mcMacPcsCfg_0_cfgMcMacPcsSyncStatusDisable_f;
                fld_id = McMacPcsCfg_mcMacPcsCfg_0_cfgMcMacPcsSyncStatusDisable_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsCfg_mcMacPcsCfg_0_cfgPcsTestMode_f:
                step   = McMacPcsCfg_mcMacPcsCfg_1_cfgPcsTestMode_f - McMacPcsCfg_mcMacPcsCfg_0_cfgPcsTestMode_f;
                fld_id = McMacPcsCfg_mcMacPcsCfg_0_cfgPcsTestMode_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_rx_cal(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacRxCal_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacRxCal_m mcmac_reg;

    index  = DRV_INS(inst_id, entry_id);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_rx_cal_bak(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacRxCalBak_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacRxCalBak_m mcmac_reg;

    index  = DRV_INS(inst_id, entry_id);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_rx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacRxSoftReset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacRxSoftReset_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacRxSoftReset_cfgMcMacMacRxSoftReset_f:
            case McMacRxSoftReset_cfgMcMacMiiRxSoftReset_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcmac_reg);
                if(CTC_IS_BIT_SET(value, fld_info[fld_idx].idx))
                {
                    value = 1;
                }
                else
                {
                    value = 0;
                }
                break;
            default:
                value = 0;
                break;
        }
        fld_info[fld_idx].value = value;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_rx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacRxSoftReset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacRxSoftReset_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacRxSoftReset_cfgMcMacMacRxSoftReset_f:
            case McMacRxSoftReset_cfgMcMacMiiRxSoftReset_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcmac_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_stats0_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStats0Cfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacStats0Cfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_stats1_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStats1Cfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacStats1Cfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_stats_init(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStatsInit_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacStatsInit_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_stats_ram0(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStatsRam0_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacStatsRam0_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_stats_ram1(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStatsRam1_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacStatsRam1_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_tx_cal(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacTxCal_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacTxCal_m mcmac_reg;

    index  = DRV_INS(inst_id, entry_id);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_tx_cal_bak(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacTxCalBak_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacTxCalBak_m mcmac_reg;

    index  = DRV_INS(inst_id, entry_id);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_tx_chan_id_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacTxChanIdLaneCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McMacTxChanIdLaneCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacTxChanIdLaneCfg_cfgTxChanIdLane_0_cfgTxChanIdLane_f:
                step   = McMacTxChanIdLaneCfg_cfgTxChanIdLane_1_cfgTxChanIdLane_f - McMacTxChanIdLaneCfg_cfgTxChanIdLane_0_cfgTxChanIdLane_f;
                fld_id = McMacTxChanIdLaneCfg_cfgTxChanIdLane_0_cfgTxChanIdLane_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_tx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacTxSoftReset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacTxSoftReset_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacTxSoftReset_cfgMcMacMacTxSoftReset_f:
            case McMacTxSoftReset_cfgMcMacMiiTxSoftReset_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcmac_reg);
                if(CTC_IS_BIT_SET(value, fld_info[fld_idx].idx))
                {
                    value = 1;
                }
                else
                {
                    value = 0;
                }
                break;
            default:
                value = 0;
                break;
        }
        fld_info[fld_idx].value = value;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_write_tx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacTxSoftReset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McMacTxSoftReset_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacTxSoftReset_cfgMcMacMacTxSoftReset_f:
            case McMacTxSoftReset_cfgMcMacMiiTxSoftReset_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcmac_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcmac_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    return CTC_E_NONE;
}





#define ______WRITE_MCPCS_REGISTER_API______
int32
sys_usw_dmps_mcpcs_reg_write_800_en_clk(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs800EnClk_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McPcs800EnClk_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs800EnClk_enClkMcPcs400Core0_f:
            case McPcs800EnClk_enClkMcPcs400Core1_f:
            case McPcs800EnClk_enClkMcPcs800_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McPcs800EnClk_enClkMcFecCore0_f:
            case McPcs800EnClk_enClkMcFecCore1_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcpcs_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_fec_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400McFecCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McPcs400McFecCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_pma_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400PmaCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs400PmaCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400PmaCfg_cfgRxAutoRecoverEnLane0_f:
                step   = McPcs400PmaCfg_cfgRxAutoRecoverEnLane1_f - McPcs400PmaCfg_cfgRxAutoRecoverEnLane0_f;
                fld_id = McPcs400PmaCfg_cfgRxAutoRecoverEnLane0_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400PmaCfg_cfgTxAsyncFifoUnderrunEnLane0_f:
                step   = McPcs400PmaCfg_cfgTxAsyncFifoUnderrunEnLane1_f - McPcs400PmaCfg_cfgTxAsyncFifoUnderrunEnLane0_f;
                fld_id = McPcs400PmaCfg_cfgTxAsyncFifoUnderrunEnLane0_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400PmaCfg_cfgTxLaneRstPatLane0_f:
                step   = McPcs400PmaCfg_cfgTxLaneRstPatLane1_f - McPcs400PmaCfg_cfgTxLaneRstPatLane0_f;
                fld_id = McPcs400PmaCfg_cfgTxLaneRstPatLane0_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400PmaCfg_cfgTxPatModeLane0_f:
                step   = McPcs400PmaCfg_cfgTxPatModeLane1_f - McPcs400PmaCfg_cfgTxPatModeLane0_f;
                fld_id = McPcs400PmaCfg_cfgTxPatModeLane0_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_800_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs800Reset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McPcs800Reset_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs800Reset_cfgSoftResetMcFec0_f:
            case McPcs800Reset_cfgSoftResetMcFec1_f:
            case McPcs800Reset_cfgSoftResetMcPcs0_f:
            case McPcs800Reset_cfgSoftResetMcPcs1_f:
            case McPcs800Reset_cfgSoftResetMcPcsReg0_f:
            case McPcs800Reset_cfgSoftResetMcPcsReg1_f:
                fld_id = fld_info[fld_idx].field_id;
                value  = fld_info[fld_idx].value;
                break;
            case McPcs800Reset_cfgSoftResetMcFecRx0_f:
            case McPcs800Reset_cfgSoftResetMcFecRx1_f:
            case McPcs800Reset_cfgSoftResetMcFecTx0_f:
            case McPcs800Reset_cfgSoftResetMcFecTx1_f:
            case McPcs800Reset_cfgSoftResetRxChanBmp_f:
            case McPcs800Reset_cfgSoftResetTxChanBmp_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcpcs_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_rx_chan_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400RxChanCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs400RxChanCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxDskMaxAddr_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxDskMaxAddr_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxDskMaxAddr_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxDskMaxAddr_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_1_cfgRxFecCwBadCntThrd_f:
                step   = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwBadCntThrd_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwBadCntThrd_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwBadCntThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwmSfBitsEn_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxFecCwmSfBitsEn_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwmSfBitsEn_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecCwmSfBitsEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskIgnoreHiSer_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxFecDskIgnoreHiSer_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskIgnoreHiSer_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskIgnoreHiSer_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskRestartLockEn_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxFecDskRestartLockEn_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskRestartLockEn_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecDskRestartLockEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecMode_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxFecMode_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecMode_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxFecMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxForceRealign_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxForceRealign_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxForceRealign_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxForceRealign_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxHiSerIndEn_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxHiSerIndEn_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxHiSerIndEn_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxHiSerIndEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanCfg_cfgRxChan_0_cfgRxUnCorIndEn_f:
                step   = McPcs400RxChanCfg_cfgRxChan_1_cfgRxUnCorIndEn_f - McPcs400RxChanCfg_cfgRxChan_0_cfgRxUnCorIndEn_f;
                fld_id = McPcs400RxChanCfg_cfgRxChan_0_cfgRxUnCorIndEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_rx_fec_chan_map(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400RxFecChanMap_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs400RxFecChanMap_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400RxFecChanMap_cfgFec0Chan0PcsChan_f:
                step   = McPcs400RxFecChanMap_cfgFec0Chan1PcsChan_f - McPcs400RxFecChanMap_cfgFec0Chan0PcsChan_f;
                fld_id = McPcs400RxFecChanMap_cfgFec0Chan0PcsChan_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxFecChanMap_cfgFec1Chan0PcsChan_f:
                step   = McPcs400RxFecChanMap_cfgFec1Chan1PcsChan_f - McPcs400RxFecChanMap_cfgFec1Chan0PcsChan_f;
                fld_id = McPcs400RxFecChanMap_cfgFec1Chan0PcsChan_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxFecChanMap_cfgPcsChan0CodecSel_f:
                step   = McPcs400RxFecChanMap_cfgPcsChan1CodecSel_f - McPcs400RxFecChanMap_cfgPcsChan0CodecSel_f;
                fld_id = McPcs400RxFecChanMap_cfgPcsChan0CodecSel_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxFecChanMap_cfgPcsChan0FecChan_f:
                step   = McPcs400RxFecChanMap_cfgPcsChan1FecChan_f - McPcs400RxFecChanMap_cfgPcsChan0FecChan_f;
                fld_id = McPcs400RxFecChanMap_cfgPcsChan0FecChan_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_rx_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400RxLaneCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs400RxLaneCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxAmInterval_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxAmInterval_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxAmInterval_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxAmInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxChanSpeed_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxChanSpeed_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxChanSpeed_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxChanSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCl161Mode_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxCl161Mode_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCl161Mode_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCl161Mode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCwmLockFsmMode_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxCwmLockFsmMode_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCwmLockFsmMode_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxCwmLockFsmMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxFecNibbleCmpThrd_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxFecNibbleCmpThrd_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxFecNibbleCmpThrd_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxFecNibbleCmpThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxForceRelock_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxForceRelock_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxForceRelock_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxForceRelock_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxLaneSpeed_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxLaneSpeed_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxLaneSpeed_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxLaneSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneCfg_cfgRxLane_0_cfgRxRsFecEn_f:
                step   = McPcs400RxLaneCfg_cfgRxLane_1_cfgRxRsFecEn_f - McPcs400RxLaneCfg_cfgRxLane_0_cfgRxRsFecEn_f;
                fld_id = McPcs400RxLaneCfg_cfgRxLane_0_cfgRxRsFecEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_800_rx_phy_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs800RxPhyLaneCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs800RxPhyLaneCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxChanId_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxChanId_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxChanId_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxChanId_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecBypass_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxFcFecBypass_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecBypass_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecBypass_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecEn_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxFcFecEn_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecEn_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndAll_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxFcFecIndAll_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndAll_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndAll_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndEn_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxFcFecIndEn_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndEn_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecIndEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecLatencyMode_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxFcFecLatencyMode_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecLatencyMode_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxFcFecLatencyMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLaneBitDemuxEn_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxLaneBitDemuxEn_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLaneBitDemuxEn_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLaneBitDemuxEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLogicLaneId_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxLogicLaneId_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLogicLaneId_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxLogicLaneId_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxPmaWidth_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxPmaWidth_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxPmaWidth_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxPmaWidth_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxRsFecEn_f:
                step   = McPcs800RxPhyLaneCfg_cfgRxPhyLane_1_cfgRxRsFecEn_f - McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxRsFecEn_f;
                fld_id = McPcs800RxPhyLaneCfg_cfgRxPhyLane_0_cfgRxRsFecEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_tx_chan_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400TxChanCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs400TxChanCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400TxChanCfg_cfgTxChan_0_cfg50GCwmPadMode_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfg50GCwmPadMode_f - McPcs400TxChanCfg_cfgTxChan_0_cfg50GCwmPadMode_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfg50GCwmPadMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfg100GCwmMode_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfg100GCwmMode_f - McPcs400TxChanCfg_cfgTxChan_0_cfg100GCwmMode_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfg100GCwmMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgCl161Mode_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgCl161Mode_f - McPcs400TxChanCfg_cfgTxChan_0_cfgCl161Mode_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgCl161Mode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreFecDegraded_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgIgnoreFecDegraded_f - McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreFecDegraded_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreFecDegraded_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreRxLocalDegraded_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgIgnoreRxLocalDegraded_f - McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreRxLocalDegraded_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgIgnoreRxLocalDegraded_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgReserved_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgReserved_f - McPcs400TxChanCfg_cfgTxChan_0_cfgReserved_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgReserved_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgTxCwmSfBit2To0_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgTxCwmSfBit2To0_f - McPcs400TxChanCfg_cfgTxChan_0_cfgTxCwmSfBit2To0_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgTxCwmSfBit2To0_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadBits_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgTxRs272PadBits_f - McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadBits_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadBits_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadMode_f:
                step   = McPcs400TxChanCfg_cfgTxChan_1_cfgTxRs272PadMode_f - McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadMode_f;
                fld_id = McPcs400TxChanCfg_cfgTxChan_0_cfgTxRs272PadMode_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxCodecSelChan0_f:
                step   = McPcs400TxChanCfg_cfgTxCodecSelChan1_f - McPcs400TxChanCfg_cfgTxCodecSelChan0_f;
                fld_id = McPcs400TxChanCfg_cfgTxCodecSelChan0_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400TxChanCfg_cfgTxFecChan0_f:
                step   = McPcs400TxChanCfg_cfgTxFecChan1_f - McPcs400TxChanCfg_cfgTxFecChan0_f;
                fld_id = McPcs400TxChanCfg_cfgTxFecChan0_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_400_tx_fec_err_insert(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400TxFecErrInsert_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McPcs400TxFecErrInsert_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_write_800_tx_phy_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs800TxPhyLaneCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McPcs800TxPhyLaneCfg_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxAsyncFifoCreditThrd_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxAsyncFifoCreditThrd_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxAsyncFifoCreditThrd_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxAsyncFifoCreditThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxBufStartRdThrd_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxBufStartRdThrd_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxBufStartRdThrd_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxBufStartRdThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxChanId_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxChanId_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxChanId_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxChanId_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneAsyncFifoStartThrd_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxLaneAsyncFifoStartThrd_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneAsyncFifoStartThrd_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneAsyncFifoStartThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneFcFecEn_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxLaneFcFecEn_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneFcFecEn_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneFcFecEn_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneId_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxLaneId_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneId_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxLaneId_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxPmaWidth_f:
                step   = McPcs800TxPhyLaneCfg_cfgTxPhyLane_1_cfgTxPmaWidth_f - McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxPmaWidth_f;
                fld_id = McPcs800TxPhyLaneCfg_cfgTxPhyLane_0_cfgTxPmaWidth_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mcpcs_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    return CTC_E_NONE;
}





#define ______WRITE_MCHATA_REGISTER_API______
int32
sys_usw_dmps_mchata_reg_write_enable(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McHataEnable_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McHataEnable_m mchata_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McHataEnable_cfgHataRxEnable_f:
            case McHataEnable_cfgHataTxEnable_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mchata_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mchata_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mchata_reg_write_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McHataRxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McHataRxCfg_m mchata_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McHataRxCfg_cfgHataRxSelTsFormat_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McHataRxCfg_cfgHataRsFecMode0_f:
                step   = McHataRxCfg_cfgHataRsFecMode1_f - McHataRxCfg_cfgHataRsFecMode0_f;
                fld_id = McHataRxCfg_cfgHataRsFecMode0_f + step * fld_info[fld_idx].idx;
                break;
            case McHataRxCfg_cfgHataRxFreeRtcId0_f:
                step   = McHataRxCfg_cfgHataRxFreeRtcId1_f - McHataRxCfg_cfgHataRxFreeRtcId0_f;
                fld_id = McHataRxCfg_cfgHataRxFreeRtcId0_f + step * fld_info[fld_idx].idx;
                break;
            case McHataRxCfg_cfgHataRxTodRtcId0_f:
                step   = McHataRxCfg_cfgHataRxTodRtcId1_f - McHataRxCfg_cfgHataRxTodRtcId0_f;
                fld_id = McHataRxCfg_cfgHataRxTodRtcId0_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mchata_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mchata_reg_write_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McHataSoftResetCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McHataSoftResetCfg_m mchata_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McHataSoftResetCfg_cfgMcHataRxSoftReset_f:
            case McHataSoftResetCfg_cfgMcHataTxSoftReset_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mchata_reg);
                if(fld_info[fld_idx].value)
                {
                    CTC_BIT_SET(value, fld_info[fld_idx].idx);
                }
                else
                {
                    CTC_BIT_UNSET(value, fld_info[fld_idx].idx);
                }
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mchata_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mchata_reg_write_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McHataTxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    uint32 step    = 0;
    McHataTxCfg_m mchata_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McHataTxCfg_cfgHataTxSelTsFormat_f:
            case McHataTxCfg_cfgHataTxPtpDomain_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McHataTxCfg_cfgHataTxFreeRtcId0_f:
                step   = McHataTxCfg_cfgHataTxFreeRtcId1_f - McHataTxCfg_cfgHataTxFreeRtcId0_f;
                fld_id = McHataTxCfg_cfgHataTxFreeRtcId0_f + step * fld_info[fld_idx].idx;
                break;
            case McHataTxCfg_cfgHataTxTodRtcId0_f:
                step   = McHataTxCfg_cfgHataTxTodRtcId1_f - McHataTxCfg_cfgHataTxTodRtcId0_f;
                fld_id = McHataTxCfg_cfgHataTxTodRtcId0_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mchata_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mchata_reg_write_tx_phy_lane2chan_map(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McHataTxPhyLaneToChanMap_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McHataTxPhyLaneToChanMap_m mchata_reg;

    index  = DRV_INS(inst_id, entry_id);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        value  = fld_info[fld_idx].value;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOW_FIELD_NZ(core_id, 0xff, 0xff, lchip, tbl_id, inst_id, fld_id, &value, &mchata_reg);
    }

    cmd    = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mchata_reg));

    return CTC_E_NONE;
}



#define ______READ_MCMAC_REGISTER_API______
int32
sys_usw_dmps_mcmac_reg_read_cal_ctrl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacCalCtrl_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    McMacCalCtrl_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_mac_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMacRxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacMacRxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMacRxCfg_cfgMacMuxMcMacRxEnDisable_f:
            case McMacMacRxCfg_cfgMacMuxMcMacRxEnValue_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxCrcCheckEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxCrcCheckEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxFreeRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxFreeRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxLocalRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxLocalRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxPktEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxPktEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxSelTsFormat_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSelTsFormat_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxSpeed_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxStatsRuntPauseEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPauseEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxStatsRuntPfcEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxStatsRuntPfcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTailTsEn_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTailTsMode_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTailTsMode_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f:
                step   = McMacMacRxCfg_cfgMcMacMacRx_1_cfgMcMacRxTodRtcId_f - McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f;
                fld_id = McMacMacRxCfg_cfgMcMacMacRx_0_cfgMcMacRxTodRtcId_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_mac_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMacTxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacMacTxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMacTxCfg_cfgMacMuxMcMacTxEnDisable_f:
            case McMacMacTxCfg_cfgMacMuxMcMacTxEnValue_f:
                fld_id = fld_info[fld_idx].field_id;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacPmInterval_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacPmInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxAppendCrcEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxAppendCrcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxErrMaskOff_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxErrMaskOff_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxFreeRtcId_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxFreeRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxKeepTsEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxKeepTsEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPadEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPadEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPauseStallEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPauseStallEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPktEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPktEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxPtpErrEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxPtpErrEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxSendEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxSendEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxStatsBypassEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStatsBypassEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxStripCrcEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxStripCrcEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxTodRtcId_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTodRtcId_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f:
                step   = McMacMacTxCfg_cfgMcMacMacTx_1_cfgMcMacTxTsCompensateEn_f - McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f;
                fld_id = McMacMacTxCfg_cfgMcMacMacTx_0_cfgMcMacTxTsCompensateEn_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_mii_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMiiRxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacMiiRxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxBuffMaxDepth_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxBuffMaxDepth_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxChkLinkForSop_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxChkLinkForSop_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultFilterEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultFilterTimer_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultFilterTimer_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxFaultMaskLinkEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxFaultMaskLinkEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxForceFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxForceFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxIgnoreLinkDownFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxIgnoreLinkDownFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkDownForceFault_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkDownForceFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkFilterEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacMiiRxLinkFilterTimer_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacMiiRxLinkFilterTimer_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacRx4ByteAlignEn_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRx4ByteAlignEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMcMacRxCtSuperG2Mod_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMcMacRxCtSuperG2Mod_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f:
                step   = McMacMiiRxCfg_cfgMcMacMiiRx_1_cfgMiiSfdValue_f - McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f;
                fld_id = McMacMiiRxCfg_cfgMcMacMiiRx_0_cfgMiiSfdValue_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_mii_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMiiTxCfg_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacMiiTxCfg_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffLowThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffLowThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffRdThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffRdThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxBuffThrd_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxBuffThrd_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacMiiTxRdMask_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacMiiTxRdMask_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTx4ByteAlignEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTx4ByteAlignEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxAmInsertEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInsertEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxAmInterval_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxAmInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxChanSpeed_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxChanSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxCtSuperG2Mod_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxCtSuperG2Mod_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxDicEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxDicEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxFlushEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxFlushEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreLintFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLintFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreLocalFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreLocalFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIgnoreRemoteFault_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIgnoreRemoteFault_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgDelEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgDelInterval_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgDelInterval_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxIpgLen_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxIpgLen_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxLaneSpeed_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxLaneSpeed_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxMarkUnderrun_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxMarkUnderrun_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxOverClockEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxOverClockEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxPreambleLen_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxPreambleLen_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxRsFecEn_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecEn_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxRsFecMode_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxRsFecMode_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f:
                step   = McMacMiiTxCfg_cfgMcMacMiiTx_1_cfgMcMacTxThreshold_f - McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f;
                fld_id = McMacMiiTxCfg_cfgMcMacMiiTx_0_cfgMcMacTxThreshold_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_stats_ram0(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStatsRam0_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    McMacStatsRam0_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_stats_ram1(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacStatsRam1_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    McMacStatsRam1_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_mii_rx_debug_stats(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacMiiRxDebugStats_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacMiiRxDebugStats_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff0Empty_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxBuff0Empty_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff0Empty_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff0Empty_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff1Empty_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxBuff1Empty_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff1Empty_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff1Empty_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff2Empty_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxBuff2Empty_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff2Empty_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff2Empty_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff3Empty_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxBuff3Empty_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff3Empty_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxBuff3Empty_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxDataState_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxDataState_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxDataState_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxDataState_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxEopFlag_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxEopFlag_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxEopFlag_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxEopFlag_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxFaultType_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxFaultType_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxFaultType_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxFaultType_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIpgLt5BCnt_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxIpgLt5BCnt_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIpgLt5BCnt_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIpgLt5BCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterICol_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxIsDOrTAfterICol_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterICol_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterICol_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterTCol_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxIsDOrTAfterTCol_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterTCol_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsDOrTAfterTCol_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsNotIAtTCol_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxIsNotIAtTCol_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsNotIAtTCol_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxIsNotIAtTCol_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatus_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxLinkStatus_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatus_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatus_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatusRaw_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxLinkStatusRaw_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatusRaw_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxLinkStatusRaw_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxRuntPktCnt_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxRuntPktCnt_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxRuntPktCnt_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxRuntPktCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSfdFlag_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxSfdFlag_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSfdFlag_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSfdFlag_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSilentDropCnt_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxSilentDropCnt_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSilentDropCnt_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSilentDropCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSopFlag_f:
                step   = McMacMiiRxDebugStats_dbgMcMacMiiRx_1_dbgMiiRxSopFlag_f - McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSopFlag_f;
                fld_id = McMacMiiRxDebugStats_dbgMcMacMiiRx_0_dbgMiiRxSopFlag_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcmac_reg_read_pcs_debug_stats(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McMacPcsDebugStats_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McMacPcsDebugStats_m mcmac_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcmac_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBadBerCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxBadBerCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBadBerCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBadBerCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBerState_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxBerState_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBerState_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxBerState_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxErrBlockCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxErrBlockCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxErrBlockCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxErrBlockCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxHiBer_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxHiBer_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxHiBer_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxHiBer_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxIBlockCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxIBlockCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxIBlockCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxIBlockCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxInvalidBlockCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxInvalidBlockCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxInvalidBlockCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxInvalidBlockCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxSBlockCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxSBlockCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxSBlockCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxSBlockCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxTBlockCnt_f:
                step   = McMacPcsDebugStats_dbgMcMacPcs_1_dbgPcsRxTBlockCnt_f - McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxTBlockCnt_f;
                fld_id = McMacPcsDebugStats_dbgMcMacPcs_0_dbgPcsRxTBlockCnt_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcmac_reg);
    }

    return CTC_E_NONE;
}




#define ______READ_MCPCS_REGISTER_API______
int32
sys_usw_dmps_mcpcs_reg_read_800_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs800Reset_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 value   = 0;
    McPcs800Reset_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs800Reset_cfgSoftResetMcFec0_f:
            case McPcs800Reset_cfgSoftResetMcFec1_f:
            case McPcs800Reset_cfgSoftResetMcPcs0_f:
            case McPcs800Reset_cfgSoftResetMcPcs1_f:
            case McPcs800Reset_cfgSoftResetMcPcsReg0_f:
            case McPcs800Reset_cfgSoftResetMcPcsReg1_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcpcs_reg);
                break;
            case McPcs800Reset_cfgSoftResetMcFecRx0_f:
            case McPcs800Reset_cfgSoftResetMcFecRx1_f:
            case McPcs800Reset_cfgSoftResetMcFecTx0_f:
            case McPcs800Reset_cfgSoftResetMcFecTx1_f:
            case McPcs800Reset_cfgSoftResetRxChanBmp_f:
            case McPcs800Reset_cfgSoftResetTxChanBmp_f:
                fld_id = fld_info[fld_idx].field_id;
                DRV_IOR_FIELD(lchip, tbl_id, fld_id, &value, &mcpcs_reg);
                fld_info[fld_idx].value = (value & (1 << fld_info[fld_idx].idx)) ? 1 : 0;
                break;
            default:
                break;
        }
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_read_400_tx_fec_err_insert(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400TxFecErrInsert_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    McPcs400TxFecErrInsert_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        fld_id = fld_info[fld_idx].field_id;
        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcpcs_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_read_400_rx_chan_mon(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400RxChanMon_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McPcs400RxChanMon_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400RxChanMon_monRxChan_0_monRx257BGearboxDepth_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRx257BGearboxDepth_f - McPcs400RxChanMon_monRxChan_0_monRx257BGearboxDepth_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRx257BGearboxDepth_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxAlignStatus_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxAlignStatus_f - McPcs400RxChanMon_monRxChan_0_monRxAlignStatus_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxAlignStatus_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxCwmSfBits_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxCwmSfBits_f - McPcs400RxChanMon_monRxChan_0_monRxCwmSfBits_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxCwmSfBits_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxFecDskFsm_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxFecDskFsm_f - McPcs400RxChanMon_monRxChan_0_monRxFecDskFsm_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxFecDskFsm_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxLocalDegraded_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxLocalDegraded_f - McPcs400RxChanMon_monRxChan_0_monRxLocalDegraded_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxLocalDegraded_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxRemoteDegraded_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxRemoteDegraded_f - McPcs400RxChanMon_monRxChan_0_monRxRemoteDegraded_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxRemoteDegraded_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxChanMon_monRxChan_0_monRxSyncStatus_f:
                step   = McPcs400RxChanMon_monRxChan_1_monRxSyncStatus_f - McPcs400RxChanMon_monRxChan_0_monRxSyncStatus_f;
                fld_id = McPcs400RxChanMon_monRxChan_0_monRxSyncStatus_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcpcs_reg);
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_mcpcs_reg_read_400_rx_lane_mon(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info)
{
    uint8  fld_idx = 0;
    uint32 tbl_id  = McPcs400RxLaneMon_t;
    uint32 fld_id  = 0;
    uint32 index   = 0;
    uint32 cmd     = 0;
    uint32 step    = 0;
    McPcs400RxLaneMon_m mcpcs_reg;

    index  = DRV_INS(inst_id, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DMPS_DRV_IOCTL_CORE(lchip, index, core_id, cmd, &mcpcs_reg));

    for (fld_idx = 0; fld_idx < fld_num; fld_idx++)
    {
        CTC_PTR_VALID_CHECK(fld_info + fld_idx);

        switch (fld_info[fld_idx].field_id)
        {
            case McPcs400RxLaneMon_monRxLane_0_monRxAmLock_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxAmLock_f - McPcs400RxLaneMon_monRxLane_0_monRxAmLock_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxAmLock_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxAmLockFsm_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxAmLockFsm_f - McPcs400RxLaneMon_monRxLane_0_monRxAmLockFsm_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxAmLockFsm_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxAmLockPcsl_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxAmLockPcsl_f - McPcs400RxLaneMon_monRxLane_0_monRxAmLockPcsl_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxAmLockPcsl_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxBipErrCnt_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxBipErrCnt_f - McPcs400RxLaneMon_monRxLane_0_monRxBipErrCnt_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxBipErrCnt_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxBlockLock_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxBlockLock_f - McPcs400RxLaneMon_monRxLane_0_monRxBlockLock_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxBlockLock_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxBlockLockFsm_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxBlockLockFsm_f - McPcs400RxLaneMon_monRxLane_0_monRxBlockLockFsm_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxBlockLockFsm_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxCwmLock_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxCwmLock_f - McPcs400RxLaneMon_monRxLane_0_monRxCwmLock_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxCwmLock_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxCwmLockFsm_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxCwmLockFsm_f - McPcs400RxLaneMon_monRxLane_0_monRxCwmLockFsm_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxCwmLockFsm_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxCwmLockPcsl_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxCwmLockPcsl_f - McPcs400RxLaneMon_monRxLane_0_monRxCwmLockPcsl_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxCwmLockPcsl_f + step * fld_info[fld_idx].idx;
                break;
            case McPcs400RxLaneMon_monRxLane_0_monRxDskDepth_f:
                step   = McPcs400RxLaneMon_monRxLane_1_monRxDskDepth_f - McPcs400RxLaneMon_monRxLane_0_monRxDskDepth_f;
                fld_id = McPcs400RxLaneMon_monRxLane_0_monRxDskDepth_f + step * fld_info[fld_idx].idx;
                break;
            default:
                fld_id = DMPS_INVALID_VALUE_U32;
                break;
        }

        SYS_CONDITION_CONTINUE(DMPS_INVALID_VALUE_U32 == fld_id);
        DRV_IOR_FIELD(lchip, tbl_id, fld_id, &(fld_info[fld_idx].value), &mcpcs_reg);
    }

    return CTC_E_NONE;
}



#define ______READ_MCHATA_REGISTER_API______



